Improvement in Cavity and Model Designs of LDMOS Power Amplifier for Suppressing Metallic Shielding Cover Effects
Some key technical issues are addressed for improving electromagnetic compatibility (EMC) design of metallic shielding cavity for achieving better RF performance of LDMOSFET-based power amplifier (PA). With the help of an Automation Testing Bench, its input-output responses are at first measured and compared, where an interactive influence between the PA and PCB is studied in detail. The internal and outer matching structures of LDMOSFET on the PCB are simulated using the commercial full-wave software HFSS. Perturbation theory is used to analyze the shielding cover effects with different package sizes and cavity heights sensitivity considered. Some guidelines for selecting suitable inner shielding structure and cavity height are given, and an improved model for both LDMOSFET and PA module is proposed and analyzed. Furthermore, it is integrated with the lumped-element circuit model of die and cosimulated using the software ADS 2013, and good agreement between the simulated and measured results is obtained. The most sensitive feedback path of electromagnetic interference inside the shielding cavity is characterized and a metallic isolation wall is introduced between the input (gate) and output (drain) of the LDMOSFET die for suppressing inner coupling effects. This research should be useful for the development of compact and miniaturized PA modules with our desired EMC performance.