Transceiver chip design in high voltage 0.25µm CMOS technology for magnetic resonance system
A transceiver IC chip of wireless power transfer is design for wearable device application. The chip forced a VDD of 24V is operated at 11MHz clock rate. The non-overlap clock technique is adopted in chip design for improving the efficiency. To verify the proposed circuit, the chip is implemented by TSMC High Voltage 0.25μm CMOS technology. The testing board is design to measure the IC chip. The driver chip dissipates 23.48W from DC source and deliver a power of 22.73W to 22Ω load. Therefore, the IC chip efficiency is 92.3%. The magnetic resonance coil is design to test the IC chip. The measurement S21 peak is occurred at 5.5MHz in resonance coil.