The impact on device characteristics with STI formed by spin-on dielectric in high density NAND flash memory
The electrical impact from adopting spin-on dielectric (SOD) for shallow trench isolation is demonstrated in this paper. Although perfect STI gap filling and suppressed re-oxidation of tunneling oxide near the active area (AA) edge are achieved through SOD process, some unexpected side effects occur. In peripheral area, severe corner thinning of thick gate oxide and positive fixed charge inside STI are observed, leading to distorted transistor I–V characteristics and deteriorated junction/well isolation capability. They are attributed to the mechanical stress from volume shrinkage when SOD material is transformed into pure silicon dioxide. [1]