Designing systolic arrays using digit-serial arithmetic
A method of transforming systolic arrays using bit-parallel arithmetic into arrays using digit-serial arithmetic is described. Digit-serial computation is an area-time efficient method of doing high-speed arithmetic calculations, having the advantage through appropriate choice of digit and word size of allowing throughput capacity to be matched to design needs. For a certain class of systolic arrays, digit-serial arithmetic allows a further very significant benefit by transforming arrays in which processors are under-utilized into arrays late with 100% processor utilization. >