A New Approach For Memory Efficient ATV Decoding
In this paper we propose an efficient memory saving architecture for an ATV decoder. In this new architecture, the motion-compensation is performed in the frequency domain. This makes it possible for anchor frames to be saved as compressed bits, resulting in significant memory savings with the addition of several extra devices in the decoder. The increase in complexity is small compared to the reduction in memory requirements. The simulation results with the new decoder architecture have shown that the reconstructed image quality is close to that of the conventional decoder.