An Improved Error Amplifier with Initial Voltage Reference
An improved error amplifier with initial voltage reference for power management applications is presented in this paper. Based on the structure of LDO, a simple structured and high integration voltage regulator by optimizing the circuit topology is accomplished. The characteristics of the improved error amplifier are simulated by using Hspice and Samsung Bipolar Process BCH4 device models. It achieves that the phase margin is 66.7deg, the unit gain bandwidth is 2.1MHz, the zero frequency gain is 92.7dB, the CMRR is 145 dB, and the PSRR (f = 100Hz) is -97.6dB. It is implemented in a LDO design and has been taped-out in Samsung