22.6 A fully integrated counter-flow energy reservoir for 70%-efficient peak-power delivery in ultra-low-power systems
Recent advances in circuits have enabled significant reduction in the size of wireless systems such as implantable biomedical devices. As a consequence, the battery integrated in these systems has also shrunk, resulting in high internal resistances (∼10kΩ). However, the peak-current requirement of power-hungry components such as radios remains in the mW range, and hence cannot be directly supplied from the battery. Therefore, duty-cycled architectures such as pulsed-based radios have been proposed that transmit a short burst (∼1µs) of high power (∼10mW) supplied by an internal energy storage capacitor [1–3]. The capacitor is then recharged using a current limiter to protect the battery from excessive droop. This paradigm raises two challenges: 1) to supply sufficient energy, very large capacitance (>50nF) is often needed (200mV droop, for 10mW and 5µs), leading to large die area or bulky off-chip discrete components; 2) only a small fraction (∼5%) of energy stored in the capacitor is actually delivered to the high power components since the capacitor can only be discharged by a few 100s of mV while maintaining proper circuit operation (Fig. 22.6.1).