An improved area-efficient design method for interpolation filter of Sigma-Delta audio DAC
This paper presents an improved area-efficient design method to construct interpolation filter of Sigma-Delta audio digital-to-analog converter (DAC). Several architectures and implementation techniques are adopted to reduce the complexity of the system. The Matlab simulation, FPGA verification and digital synthesis are performed to support the feasibility of the presented method. The cell area of the interpolation filter built by this method is 0.33mm2 in TSMC 0.18µm COMS process.