Design of a 24 GHz ultra low power current reused CMOS LNA in subthreshold region
This paper presents a single-stage ultra-low power low voltage low noise amplifier (LNA) at 24 GHz in commercially available CMOS technology in 90 nm. The LNA has been implemented by using current reused technique with operation biased in subthreshold region to reduce power consumption. The state of art LNA in this work achieves 10 dB power gain (S21), 1.2 dB noise figure (NF), and input-referred third-order intercept point (IIP3) of 12 dB. It consumes significantly low power of only 160 uW from very low voltage power supply of 0.55 V and DC current of 287 uA at 24 GHz.