The nature of defect patterns on integrated-circuit wafer maps
The history of IC-yield models dates from those based on the simple Poisson distribution to current models based on the families of compound and generalized Poisson distributions. The latter are more complex because the IC chips have grown larger in area and circuit density, thereby unveiling the clustering (aggregation) properties of defects on wafers. These clustering properties are reflected by the parameters of the distributions on which the existing yield models are based. The possibility of any statistical distribution providing an exact representation of some actual population is very small. It is important, though, that the parameters of alternative statistical distributions describing some actual population should have some physical meaning. This paper considers 3 distributions used to model empirical defect distributions in IC manufacturing. The applicability of these distributions depends strongly on the area of the chips fabricated on a wafer. The authors discuss the cases where a study of the parameters alone might not provide conclusive evidence about the spatial properties of defect patterns on IC-wafer maps. They propose some measures to explain defect clustering: variance/mean ratio, turning point, mean crowding, and patchiness. Due to the complementary nature of these measures, no measure, by itself, can provide sufficient information about defect patterns or complete details of the differences between several patterns. It is therefore instructive to analyze defect patterns by as many measures as feasible. >