A neural network for scheduling and allocation in VLSI design
Neural networks have shown success in solving some difficult optimization problems. Problems become more complex, it is increasingly difficult to find a suitable encoding of constraints into an energy function, which will effectively guide the network to a desired solution. In previous work by Gassen and Carothers (1993), a difficult scheduling problem in VLSI design was encoded into a Hopfield-type neural network. In this paper, we report significant enhancements which allow additional design constraints to be considered and more flexibility for considering the specific design under development.<<ETX>>