A low power adaptive transmitter architecture for low band UWB applications
An adaptive CMOS UWB transmitter architecture based on programmable pulse position modulation (PPPM) is proposed. It can operate in high-speed mode and power-saving mode depending on various QoS constrains. When the data rate is the primary concern, the transmitter operates at high-speed mode. When the power consumption becomes the major constrain, the transmitter can switch to power-saving mode. The high frequency 80 MHz clock is generated from a 10 MHz low frequency reference by a DLL-based frequency multiplier. The proposed adaptive UWB transmitter has been designed and simulated by using TSMC 0.18mum CMOS process. Simulation results shows proposed transmitter can provide a flexible knob for cross-layer QoS optimization with low power consumption