A VLSI reconfigurable network of integrate-and-fire neurons with spike-based learning synapses
We present a VLSIdevice comprising an array of leaky integrate-and- fire (I&F) neurons and adaptive synapses with spike-timing dependent plasticity (STDP). The neurons transmit spikes off chip and the synapses receive spikes from external devices using a communication protocol based on the "Address- Event Representation" (AER). We studied the response properties of the neurons in the array to uniform input currents, and measured their AER outputs. We char- acterized the properties of the STDP synapses using AER input spike trains. Our results indicate that these circuits can be reliably used in massively parallel VLSI networks of I&F neurons to simulate real-time complex spike-based learning al- gorithms.