Design assurance in a university setting
It is argued that VLSI design assurance in a university setting requires developing an environment in which a multiplicity of reliable designs can be produced by inexperienced designers at minimal costs. Two issues in design verification and testing are examined: the first relates to design for testability; the second is the practical verification of designs once they are implemented in silicon. It is concluded that as problems associated with design assurance are solved, the results should be of value to a broader community and especially to ASIC (application-specific integrated circuit) designers.<<ETX>>