Delay and DOA estimation for chip-asynchronous DS-CDMA systems using reduced rank space-time processing
A reduced-rank space-time processing algorithm is proposed in this work to estimate the time-delay and the direction-of-arrival (DOA) in short-code chip-asynchronous DS-CDMA systems. Most algorithms proposed before demand the inversion of the received signal correlation matrix, which has a high computational cost. Here, we attempt to reduce the complexity by decomposing the correlation matrix inversion step into the cascade of multiple stages, where each stage outputs a scalar value that is obtained without an explicit matrix inversion operation. Furthermore, it is proved that the interference signals can be suppressed effectively using a small number of stages, and the performance is not much improved by applying more stages. Computer simulations are conducted to compare the performance of the reduced rank and the full rank approaches.