Design and implementation of a switched-current memory cell for low-power and weak-current operations
This paper describes the design and implementation of a new switched-current (SI) memory cell for current-mode signal processing. The SI memory cell operates in a pico-to-nanoampere range. To obtain an acceptable accuracy, a procedure to reduce the negative effects of the nonideal characteristics of MOS transistor in SI circuits is proposed and implemented. A prototype circuit including the new SI memory cell associated with optical sensors has been fabricated with a 0.35-/spl mu/m n-well technology. The test results show that, in a range of 0.5 pA to 15 nA, the error rate of current memorization/reproduction in the proposed SI memory is below 1% and the power dissipation is in a range of nanowatts or below.