A CMOS Image Sensor with Focal Plane Discrete Cosine Transform Computation
In this paper we describe an image sensor with nonuniform pixel placement that enables a highly efficient computation of the discrete cosine transform, which is the most computationally demanding step of the image compression algorithm. This technique is based on the arithmetic Fourier transform (AFT), which we show to be 5 times more computationally efficient than currently used DCT computation methods. The architecture and circuits described can be implemented in conventional CMOS processes.