Experimental characterization of the diode-type polysilicon loads for CMOS SRAM
Experimental characterization of the diode-type n/sup +/-p-n/sup +/ poly-Si loads for SRAM applications demonstrates that the resistance of the structure and its response to the bit-line voltages are dominated by such properties of the parasitic thin-film transistor associated with this device as fixed positive charge and 'gate' oxide thickness. Topographical effects observed in this study are interpreted in terms of the thickness variation of a dielectric overlaying the poly-Si feature and the fixed positive charges present in this dielectric in the vicinity of the poly-Si surface. >