A novel approach for preprocessing analog signal using number theoretic transform
In this paper, a preprocessing architecture for folding Analog-to-Digital converter (ADC) based on a new number system called Robust Folding Number System (RFNS) is presented. The RFNS is developed from robust symmetrical number system (RSNS) that was proposed by Pace et al [4]. The enhanced Dynamic Range (DR) of RFNS due to the introduction of the folding bit results in higher ADC resolution. The Symmetrical Residues (SRs) that are obtained in the intermediate step during processing of analog signals are converted to equivalent residues by simple mapping. This results in a conversion architecture that is less complex compared to that proposed in [6].