An ultra-low-power variable-accuracy bit-serial FFT butterfly processing element for IoT sensors
A key challenge in the design of Internet-of-Things sensors, specifically those powered by energy harvesters, is to minimise the power consumption and realize energy-scalable operation to meet the requirements of the variable power source. This paper proposes an ultra-low power Decimation-in-Time (DIT) radix-2 butterfly arithmetic block for an FFT processor, designed using a bit-serial architecture and operating at a near-threshold voltage (0.6 V). The bit-precision of the design can be dynamically adjusted between 8 and 16 bits. The reduced precision processing can decrease operation clock cycles and energy consumption. The proposed design is demonstrated using IBM 130-nm CMOS logic process and results show that at a 16kHz throughput frequency, the active power and energy consumption are only 315 nW and 31 pJ per butterfly respectively for 16-bit accuracy. This represents a saving of 61 % and 84 % respectively compared with an equivalent state-of-the-art parallel design. Furthermore, approximately a 46.2 % additional energy saving can be achieved if the bit precision is reduced to 8 bits.