Approximate SAD computation for real-time low power video encoders
This paper presents a heuristic approach to reduce the computational power requirement of SAD cost function used in the motion estimation phase of video encoding. The proposed technique selects the best matched macroblock based on partial SAD sums. This results in lower power consumption with marginal loss in image quality. Different levels to trade-off image quality with computational power have also been proposed. The mathematical intuition in support of the heuristics is discussed. Our approach shows good performance, especially at low bitrates.