A VLSI architecture for hierarchical mesh based motion compensation using scalable affine transformation core
This paper presents a VLSI architecture for hierarchical mesh based motion compensation. It uses a hierarchical adaptive structured mesh, which minimizes the number of bits describing the mesh. The mesh is constructed as triangular patches that describe the motion at different resolutions. Image warping is used to reconstruct the frame, whereas an affine transformation is used to texture map the triangular patches. The architecture implements a scalable affine transformation core, which can be used with any level of hierarchical mesh. The architecture has been prototyped and performance measures have been conducted. The prototype can be used as building block for MPEG-4 codec.