Low power SOVA architecture using bi-directional scheme
The soft output Viterbi algorithm (SOVA) is the main building block in the turbo coding receiver. A major problem in implementing SOVA is the high complexity and hence high power consumption. In this paper we present a low power SOVA architecture. Low power optimization is performed on the system level using a bi-directional scheme to increase the throughput of SOVA then trading throughput by reducing the power supply voltage. The prototype adheres to the third generation wireless standard. Evaluated results shows that power consumption could be reduced by 50% with about twice the increase in area.