Development and characterization of a through-multilayer TSV integrated SRAM module
In this study, a stacked SRAM module with a built-in decoder was proposed with a through-multilayer TSV integration process. The through-multilayer TSVs provided data passages for all common signals, including the address bus, data bus, power, read and write control, which were redistributed at each individual chip, while the chip select signals were connected separately to the built-in decoder. Regarding this process, a novel double-layer spin coating technology was employed to prevent photoresist residue left inside TSVs, and the RDLs in this process could be fabricated using lift-off process prior to via filling. As a result, the front side CMP process was not necessary. A 10-layer through-multilayer TSV integration sample was successfully fabricated with this process. Preliminary testing results suggested that this process was promising for integration of memory chips with similar layout.