CFD-based thermal characterization of board-level microelectronic devices under natural convection cooling
In the present paper, a systematic investigation on steady-state heat dissipation of a board-level microelectronic device under natural convection cooling is performed. For solving the conjugate solid- fluid heat transfer problems, a three-dimensional computational fluid dynamics (CFD) model is developed. The effectiveness of the proposed CFD model is extensively verified through experimental validations: an existing thermal test die experiment based on joint electron device engineering council (JEDEC) specification under a natural convection environment and a PBGA typed package is considered as test vehicle. The package is assembled to a thermal test board, which is a four-layer printed circuit board (PCB). For best controlling of the heating powers and furthermore, conducting chip junction temperature measurement, the specifically designed thermal test chip are used instead of real dice. The thermal test die measurement can derive the chip junction temperature of the assembly under various chip power dissipation rates. Based on the validated CFD model, a evaluation of empirical heat transfer correlation model is proceeded under various chip power dissipation rate. In addition, the effect of PCB structure on the thermal performance of the device under natural convection is also addressed.