Optimization of canonic signed digit multipliers for filter design
Constant multiplication can be carried out efficiently using a canonical signed-drift (CSD) representation of the multiplier. With this method, the multiplier can be implemented using a series of shifts and additions or subtractions. The author considers the optimization of such CSD multipliers by finding the correct sequence for shifting and adding. A computer program has been Written that will synthesize CSD multipliers in such a way as to minimize hardware and latency, producing optimal CSD multipliers. Applying these methods to finite-impulse-response (FIR) expressions, it is possible to reduce greatly the number of arithmetic operations needed.<<ETX>>