An algorithm transformation technique for multi-dimensional DSP systolic arrays
Algorithm such as FIR (finite-impulse-response) filtering, 1-D convolution, and DFT (discrete Fourier transform), which are traditionally mapped onto 1-D systolic network, can be formally transformed and mapped onto higher-dimensional systolic networks. With suitable implementation algorithms developed for these transformed digital signal processing (DSP) algorithms, the speed of computation can be significantly improved without increasing the order of area complexity. Results of transforming and implementing these DSP algorithms onto higher-dimensional systolic arrays are presented. The proposed technique leads to a significant improvement in computational time while keeping the area complexity constant.<<ETX>>