Automotive sip LPDDR4 design space exploration for achieving system level SI performance
A novel multi-chip System-in-Package (SiP) was designed specifically for automotive applications. This paper discussed the challenges and approaches of enabling the dual x32 LPDDR4 channels with external DRAMs running at 1866 MHz. System level design space was explored to achieve better SI performance. Several key design parameters were studied separately to investigate their impacts on the SI performance. Next, a comprehensive DOE analysis was conducted to provide detailed design guidelines for characteristic impedance, channel length, trace spacing and layer transitions along with drive strength and termination values. The results of this analysis led to important design decisions for achieving a cost effective product with rich features. Based on the inputs of this study, the design was prototyped and validated in the lab and the dual LPDDR4 channels run successfully at the desired speed-bin.