Accurate extraction of parasitic series resistances and inductances for GaAs HFET
An accurate extraction method of the parasitic series resistances and inductances for a GaAs HFET is presented. The measurement of S-parameters is under the condition of cold FET (vds=0 V, vgs=0 V), the extraction procedure is not a direct extraction method, but a based-on optimisation method using a genetic algorithm. Good agreement compared with measurement is achieved.