Voltage-Insensitive Negative Group Delay Circuit Based on a Stepped-Impedance Distributed Amplifier
A negative group delay (NGD) circuit with a steady group delay and reduced number of bias is presented in this letter. The proposed NGD circuit based on a distributed amplifier (DA) is insensitive to the biasing voltage level. By adjusting the characteristic impedances of input and output transmission lines of the DA at different stages, NGD characteristics can be realized under the same bias. This results in the fact that only one single bias voltage is needed for the gate to meet the required transfer function between the reversed and input port to synthesize NGD. More importantly, the NGD is no longer sensitive to the transistor’s bias voltage, which lays an important foundation for practical applications. The measured results show that, under various bias conditions, the circuit can provide −1 ns group delay level within 0.13-GHz NGD bandwidth. In addition, the gain of the proposed NGD circuit is configurable by adjusting the bias level.