CDSP: an application-specific digital signal processor for third generation wireless communications
We present an application-specific digital signal processor (DSP) for third generation wireless communications. The processor architecture and instruction set of proposed DSP are specially designed for the WCDMA system, where the Viterbi decoding and complex arithmetic are enhanced. These key features make the proposed DSP consume much lower processor MIPS and therefore outperform prior arts in terms of several crucial operations of wireless applications. A prototyping chip has been implemented by using cell-based design approach under TSMC 0.35 /spl mu/m CMOS IP4M technology. At 3.3 V supply voltage, it can operate up to 40 MHz.