Green arithmetic logic unit
With the scaling of technology and the need for high performance and more functionality, power dissipation becomes a major bottleneck for microprocessor systems design. The power dissipation has become an obsessive concern in the design and implementation of VLSI circuits with the development of the technology. In this paper, conventional low-power design approaches are discussed, and a new design based on Chain structure is presented. It provides a green solution and an alternative way to solve the problems of power supply distribution, interconnection and interfacing in VLSI circuits and a comparison experiment was performed over two circuit layouts of 16bit ALIT implementations and using standard CMOS that saves more than 30% of power consumption, and 0.423 mg of CO2 emission.