FPGA implementation of a message-passing OFDM receiver for impulsive noise channels
Conventional orthogonal frequency division multiplexing (OFDM) communication systems are typically designed assuming additive white Gaussian noise and interference statistics. However, in many applications, such as Wi-Fi and powerline communications (PLC), impulsive statistics are often observed. Impulsive noise can degrade the signal-to-noise ratio (SNR) of all subcarriers and impair communication performance. In this work, we design and implement a real-time OFDM receiver with approximate message passing (AMP) to estimate and mitigate impulsive noise. The goal is to meet throughput and latency requirements while guaranteeing improved communication performance in impulsive noise. Our contributions include (i) modeling functional parallelism in an AMP OFDM receiver in synchronous dataflow, (ii) converting an AMP OFDM PLC receiver to using only fixed-point data and arithmetic, and (iii) mapping the receiver in fixed-point onto a Field Programmable Gate Array (FPGA) target using a high-level graphical synthesis tool. Our FPGA OFDM transceiver testbed achieves full streaming throughput at G3-PLC rates and recovers up to 8 dB SNR of impulsive noise over a wide SNR range.