Self-Sleep Buffer for Distributed MTCMOS Design
Leakage power is considered as major concern in deep sub-micrometer VLSI designs. MTCMOS technology was introduced to provide considerable power reduction in standby mode, while maintaining high performance in active mode. However, MTCMOS presents new challenges that require extra design effort. This paper targets the challenges and complexities related to sleep signal distribution in a distributed MTCMOS design. We propose synchronized dual-V,h self-sleep buffer method that eliminates the need for sleep signal distribution and allows easy implementation of MTCMOS wakeup scheduling. Guidelines for designing and sizing the self-sleep buffer circuit are provided. In a 90-nm technology and 2-GHz clock frequency, the self-sleep buffer consumes only 1.46- uWin active mode, while eliminating the sleep distribution network overheads and providing fast, low-energy active- to-standby-to-active transitions.