Parameterized modeling of open-circuit critical volume for three-dimensional defects in VLSI processing
In this paper, we study the impact of three-dimensional (3-D) physical defects on the functionality of integrated circuit (IC) structures. A practical extension to Pineda de Gyvez and Dani's (1992) method of IC critical volume modeling for open-circuits due to 3-D defects is presented. According to their approach, an open-circuit may result only when any two of the three dimensions of the defect are greater than the corresponding dimensions of the conducting pattern. In this way, their treatment can be considered more of a physical than electrical in nature. We analyze the increase in the resistance of a conductor due to the presence of a defect. The maximum tolerable increase in the resistance of a conductor is considered as the criterion for an open-circuit. Based on this analysis, new analytical expressions for critical volume are obtained. Some suggestions are made regarding yield modeling in presence of 3-D defects in integrated circuits.<<ETX>>