Real time noise cleaning of ultrasound images
This paper presents an efficient algorithm for real time noise cleaning of biomedical ultrasonic images and its VLSI implementation into FPGA. An optimized architecture has been designed with proper parallelism and pipelining as well as removing redundancies to achieve high speed. The implementation has been done in Xilinx XCV50TQ144-5 chip to yield a throughput of one output data per clock cycle with an operating speed of 51 MHz.