Memory accesses reduction for MIME algorithm
Power consumption of digital systems has become a critical design parameter. An important class of digital systems includes applications such as video image processing and speech recognition, which are extremely memory dominant. In such systems, a significant amount of power is consumed during memory accesses. Reducing the number of memory accesses can considerably impact the power dissipation in the rest of the design. Therefore, optimizing an application for reduced memory access can greatly effect the overall power consumption in the entire system. This paper presents an architectural enhancement multi-stage interval-based motion estimation (MIME) algorithm that not only saves power by reducing the number of memory accesses but also significantly increases the speedup.