A 70 Mb/s variable-rate 1024-QAM cable receiver IC with integrated 10 b ADC and FEC decoder
A variable-rate IF-sampled QAM receiver integrated circuit operates at symbol rates from 1 to 7 MBaud in 4, 16, 32, 64, 128, 256, and 1024-QAM. The QAM receiver is a monolithic mixed-signal device implemented in a 0.5 /spl mu/m triple-level metal single-poly CMOS process. The device incorporates a 10b A/D converter, analog PLLs, interpolating demodulator, square-root raised cosine receive filters, timing/carrier recovery loops, 20-tap complex equalizer, and a Reed-Solomon forward error correction (FEC) decoder that is compliant with European digital video broadcasting (DVB) and Digital Audio-Visual Council (DAVIC) standards. Applications of this QAM receiver include digital cable-TV set-top terminals, cable modems, and digital microwave radios.