The radix-2/sup k/ Viterbi decoding with transpose path metric processor
In this paper, we present a radix-2/sup k/ Viterbi decoding with Transpose Path Metric (TPM) processor. The TPM processor can provide a permutation function for state rearrangement with simple local interconnection. For interconnection realization, the routing complexity is less than that of the delay-commutator reported previously. In addition, a higher memory length Viterbi processor can be constructed with lower radix-2/sup k/ modules. With features of modulation and cell regularity, the radix-2/sup k/ Viterbi decoding with TPM processor is very suitable for VLSI implementation.