A tunable transconductor with high linearity
In this paper a high frequency low voltage low power tunable highly linear transconductor is presented. Shift level biasing is used at the inputs of both the amplifiers of a cross coupled differential pair for tuning. Bias currents of cross coupled differential amplifiers are adjusted to cancel third harmonic distortion. The proposed circuit is simulated in Cadence VIRTUOSO environment with UMC 0.18 µm CMOS process technology. Simulation results show that for the biasing current of 206 µA (Gm of 222 µS), the circuit exhibits less than −51 dB total third harmonic distortion (HD3) at 1 Vp-p @ 50 MHz.