A wideband and high linearity Programmable Gain Amplifier for 60GHz receiver in 65nm CMOS
A wideband and high linearity IF programmable gain amplifier (PGA) is presented for 60GHz wireless receivers. The core of the circuit is a differential amplifier based on the “flipped voltage follower” (FVF) cell. The FVF cell introduces an additional zero and extends the bandwidth without extra power consumption. The presented PGA has been implemented in 65nm CMOS, and the simulation results show that the proposed PGA exhibits a 3dB bandwidth more than 6GHz, a gain range from 10dB to 30dB, 13dB noise figure at 2.4GHz and −10dBm input 1-dB compression point at the lowest gain level. The core circuit consumes 11.78mW power from a 1.2V supply voltage, with a core die area of 0.045mm2.