124Ms/s pixel-pipelined motion-JPEG 2000 codec without tile memory
A JPEG2000 codec capable of processing 1920times1080 HD video at 30frames/s is implemented on a 20.1mm2 die with 0.18mum CMOS technology dissipating 345mW at 1.8V and 42MHz. The level-switched schedule eliminates the 192kB tile memory. Hardware sharing between encoder and decoder reduces silicon area by 40%