A Novel Architecture for Lempel-Ziv-Based Data Compression
In this paper, a novel VLSI architecture for Lempel-Ziv-based data compressioddecompression is presented. Based on the efficient data flow, the proposed architecture can fully exploit the data-reuse to decrease external memory accesses and reduce the pin count. In addition, Parameters of the architecture such as the sliding window size, the dictionary size, and the symbol word-length, can be changed to suit the application. The proposed architecture is a high throughput and cost-effective architecture, and very suitable for wireless communication application.