A new approach to analyze a sub-micron CMOS inverter
An analytical model is proposed for submicron CMOS devices based on Thornber's scaling law where the field dependent mobility and carrier velocity saturation are treated independently. Comparison of simulated results with the experimental results of I/spl sim/V data for sub and deep sub micrometer MOSFETs down to 0.09 /spl mu/m effective gate length demonstrates the accuracy of the model. A sub micron CMOS (0.2 /spl mu/m technology) inverter is analyzed by using the proposed model. Results show that the calculated propagation delay and output voltage waveform are in good agreement with Spectre simulation results.